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Essential Theory for AI Semiconductor Design — From Neurons to LLMs

To directly design AI semiconductors such as NPUs, Transformer accelerators, and mini LLMs, you must understand the theoretical reasons behind the operations occurring within them. This course distills the essential theories required for hardware design—from a single neuron to CNNs, Transformers, and LLMs—into a compact three-part series. Rather than memorizing formulas, you will gain an intuition for "why things work the way they do," as a current professor with 30 years of experience in the semiconductor industry bridges the gap between software theory and hardware implementation.

1 learners are taking this course

Level Beginner

Course period Unlimited

Deep Learning(DL)
Deep Learning(DL)
Machine Learning(ML)
Machine Learning(ML)
CNN
CNN
transformer
transformer
LLM
LLM
Deep Learning(DL)
Deep Learning(DL)
Machine Learning(ML)
Machine Learning(ML)
CNN
CNN
transformer
transformer
LLM
LLM

What you will gain after the course

  • The ability to intuitively understand the operating principles of neurons, neural networks, CNNs, Transformers, and LLMs

  • Core theoretical foundations required for AI hardware design, such as learning, gradient descent, and quantization.

  • Understanding the principles of how ChatGPT, GPT, and BERT are created.

  • The big picture of how AI theory translates into actual semiconductor circuits (NPUs and accelerators)

  • Theoretical foundation to understand and follow subsequent AI accelerator and NPU design practices

■ Why is this course necessary?

To design AI semiconductors like NPUs, Transformer accelerators, and mini LLMs yourself, you must understand the underlying theory of what operations occur inside and why. Simply following circuit diagrams will eventually lead to a dead end. This course distills the essential theoretical foundations necessary for designing future AI hardware into a three-part series, extracting only the most critical core concepts.

Starting from the multiplication of a single neuron to CNNs, Attention, Transformers, and LLMs — we have selected only the parts of the vast AI theory that are 'actually necessary for hardware design.' This is not theory for academic depth, but theory for hands-on creation.

■ Why this lecture is different

Existing AI theory courses on the market stop at the perspective of software and mathematics. This course is designed from the ground up as 'theory for hardware implementation.' How the multiplication and addition of neurons translate into power consumption on a chip, why Transformer matrix operations demand dedicated accelerators (NPUs), and why low-power AI semiconductors are the future — we unpack AI theory through the eyes of a semiconductor designer. A current professor with 30 years of experience in the semiconductor industry bridges the gap between software theory and hardware implementation.

■ This course is the starting point

This lecture is the theoretical starting point for the hardware design lectures that will follow.

· This course (Theory) → NPU Design → Transformer Accelerator → mini LLM SoC

You must have a solid foundation in the theories covered here to understand 'why this circuit is designed this way' in the subsequent lectures. Conversely, looking at circuits without the theory will lead to mere memorization, making it impossible to apply the knowledge.

■ 3-Part Structure

· Part 1 From Neurons to CNNs — Principles of Learning (Gradient Descent), Perceptrons and the XOR Barrier, Deep Neural Networks (DNN), Convolutional Neural Networks (CNN)

· Part 2: From RNN to Transformer — Sequential Data and RNN, Word Embedding, Attention Mechanism, Transformer

· Part 3: From Transformer to LLM — Pre-training & Transfer Learning, BERT & GPT, ChatGPT & RLHF, and onto Low-Power Semiconductors

These three parts form a single connected story. If you study them in order, you will complete the full picture, ranging from neurons to LLMs.

■ Recommended for the following people

· Those who plan to design NPUs, AI accelerators, and AI SoCs themselves in the future (based on that theory)

· Those who want to solidify the essential background theories before taking an AI hardware design course

· Those who want to understand AI from its principles, focusing on the 'core essentials for building' rather than academic depth

· Those who have heard of the terms (CNN, Attention, Transformer, LLM) but don't quite understand the underlying principles of how they work

■ This is what the lecture is about

· Carefully selected theories essential for hardware design — the essence of vast AI theories

· Focus on intuition rather than memorizing formulas — explaining 'why it works' through illustrations and analogies

· From a single neuron to LLM, a single story that flows without interruption

· A rare perspective that bridges AI theory and semiconductor hardware

· Can be completed just by watching the videos, without any separate practice, boards, or installations

■ Reference

· This is a theoretical course. Hands-on practice for building AI accelerators using FPGAs is covered in separate courses. The theory in this course serves as the foundation for those practical courses.

· All content in this lecture was created by the instructor, and the narration (voice) was produced using TTS.

Recommended for
these people

Who is this course right for?

  • Those who plan to design NPUs, AI accelerators, or AI SoCs in the future but lack a theoretical foundation.

  • For those who want to solidify the essential background theories before taking an AI hardware design course

  • Those who know terms like CNN, Attention, Transformer, and LLM but don't quite grasp how they actually work.

  • Those who want to understand AI from its principles, but prefer the 'core essentials for building' over academic depth.

Need to know before starting?

  • Explained with a focus on intuition so that it can be understood even without any special prior knowledge.

  • It is easier if you know high school-level mathematics (functions and graphs).

  • Coding and practice are not required (Theory Edition)

Hello
This is EdgeChipLab

I have 30 years of experience in the semiconductor industry (Samsung Electronics) and am currently a university professor.

I served as a system semiconductor researcher in the Samsung Electronics DS division, Director of the UK and Germany subsidiaries, and Head of the System LSI Marketing and Sales Group; I am currently teaching next-generation semiconductor design at a university.

From transistors to CPU, NPU, and AI SoC, I teach the process of making self-designed circuits operate on actual FPGAs. In particular, these lectures are not a collection of fragmented knowledge from the internet; they are the results of the instructor's own academic research and proven designs implemented on real FPGA hardware and verified as Bit-True. All source code, including the self-developed RISC-V CPU, is released on GitHub, allowing anyone to personally reproduce and verify the results using only an entry-level FPGA (Arty S7-25) and free tools (Vivado).

All lectures are connected through a single curriculum. Starting with AI theory, it progresses to image processing and AI accelerator (NPU) design and verification. It will further expand into advanced and professional courses covering RISC-V CPU, advanced NPU, AI SoC, and mini LLM. (Content is continuously updated.)

[Verifiable History]

- Self-developed RISC-V CPU — Passed the RISC-V International Foundation's official Architectural Compliance Test (ACT), source code released

- 4 single-author academic papers (published in IJIBC, a renowned KCI-indexed journal)

- Two books published on Amazon (Ranked #3 Bestseller, including AI NPU System Design with Python and Verilog)

- Verified operation of RV32I CPU, NPU, Vision, and AURA-Edge SoC on Arty S7

YouTube @EdgeChipLab · GitHub github.com/estlit

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Curriculum

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3 lectures ∙ (1hr 40min)

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