Practical Hardware with FPGA — From Digital Clocks to Real-Time Camera Video

Putting a neural network on an FPGA—the phrase is familiar, but few have actually done it. If you want to stay a step ahead in capstone projects, competitions, or graduation projects, you must be able to go beyond just training a model and actually build and prove how those computations run inside a real chip. This course bridges that exact gap between theory and physical hardware. You will complete a neural network accelerator (NPU) for MNIST digit recognition from start to finish—from reading specifications to Python golden models, Verilog RTL design, and FPGA verification. From Conv layers made with line buffers and parallel MACs, through ReLU, MaxPool, and Flatten, to fully connected layers and Argmax—you will integrate nine blocks into a single chip and prove for yourself that "the Python reference and the hardware output do not differ by even a single bit (Bit-True)." I have even included how to overcome those frustrating moments when the simulation runs fine but the results are subtly different. I will guide you through practical know-how that general deep learning textbooks don't cover, such as integer quantization, array axis reordering, and accumulator overflow prevention. I have distilled the trial and error I experienced over years of RISC-V CPU design and FPGA Bit-True verification into this course so that you don't have to repeat them. By the end of the class, you will have a completed hardware project that allows you to say, "I designed and verified it myself."

When people decide to build a CPU, they usually start by looking for a circuit diagram. However, the moment they unfold the schematic, unanswerable questions arise: Why must this block be here? Why are there two ports for reading registers? The answers all lie within the instructions. Once you know what an instruction requires, the necessary circuitry is determined. It doesn't work the other way around. There are already many RISC-V lectures available. However, most of them simply display values on a slide, say "This is how it works," and move on. Students have no way to verify if those values are correct. This course provides a Python-based instruction execution simulator. When you type `run ADD`, the machine code is assembled on the spot, the 32 bits are laid out by field, and you can see exactly how the registers change on your screen. Every number in the textbook is a result of this tool's execution, and it can be reproduced identically on your screen. Commercial debuggers require licenses, and simulators often have installation barriers. This tool only requires Python. You don't need a board, a license, or a complex setup. This is a process of executing all 40 RV32I instructions without skipping a single one, discovering for yourself what the circuit needs to do.

To directly design AI semiconductors such as NPUs, Transformer accelerators, and mini LLMs, you must understand the theoretical reasons behind the operations occurring within them. This course distills the essential theories required for hardware design—from a single neuron to CNNs, Transformers, and LLMs—into a compact three-part series. Rather than memorizing formulas, you will gain an intuition for "why things work the way they do," as a current professor with 30 years of experience in the semiconductor industry bridges the gap between software theory and hardware implementation.

When you study machine learning, you learn how to improve accuracy. But the moment you try to deploy that model onto an actual chip, you are left with questions no one ever taught you to ask: How many multiplications does this model require? What does it need to remember, and how much? Can the target chip specifications handle these demands? Machine learning textbooks focus on accuracy, while semiconductor textbooks focus on circuits, yet resources bridging the two are scarce. I repeatedly encountered this gap while implementing RISC-V CPUs and NPUs on FPGAs—facing situations where the model with the highest accuracy simply wouldn't fit on the board. In this course, you will build six algorithms from scratch in Python, measuring the number of multiplications, comparisons, memory usage, and accuracy for each. You will then translate these metrics into actual FPGA board resources. While knowing the number of multiplications alone doesn't give you a sense of scale, expressing it as a percentage of the board's resources makes it easy to assess. After completing nine labs and compiling the six models into a single table, an unexpected picture emerges. We spent nine sessions counting multiplications, only to find that multiplications weren't the actual bottleneck. From there, we move on to quantizing floating-point numbers to integers, managing bit widths, and even establishing criteria for grading circuits. An FPGA board is not required. The course can be completed using Python alone, with the board serving merely as a reference for translating the measured metrics.

Many people have learned FPGA and Verilog but get stuck at the question, "So, how do I actually build an AI accelerator?" This course resolves that curiosity. Using just a single entry-level FPGA and free tools, you will start from a hand-designed 3×3 kernel, train a CNN yourself, quantize the trained weights to INT8 to load onto the hardware, and verify that the results are Bit-True—not deviating by even a single bit from the Python model. As a professor with 30 years of experience in the semiconductor industry, I teach only verified content as 'working circuits' on actual FPGAs. By gaining the experience of designing and proving it yourself rather than just learning theory, you will acquire practical skills that are recognized in the fabless design and AI semiconductor fields.

It's time to put your design skills to the test. The most important language in semiconductor circuit design is Verilog. Self-diagnose your Verilog proficiency by solving actual problems that have appeared in circuit design interviews both domestically and abroad. Verilog coding tests are no longer an option—they are a necessity. Don't miss out on practical tips from ETA, who started at a regional university and successfully landed a job at a foreign semiconductor company.

When people decide to build a CPU, they usually start by looking for a circuit diagram. However, the moment they unfold the schematic, unanswerable questions arise: Why must this block be here? Why are there two ports for reading registers? The answers all lie within the instructions. Once you know what an instruction requires, the necessary circuitry is determined. It doesn't work the other way around. There are already many RISC-V lectures available. However, most of them simply display values on a slide, say "This is how it works," and move on. Students have no way to verify if those values are correct. This course provides a Python-based instruction execution simulator. When you type `run ADD`, the machine code is assembled on the spot, the 32 bits are laid out by field, and you can see exactly how the registers change on your screen. Every number in the textbook is a result of this tool's execution, and it can be reproduced identically on your screen. Commercial debuggers require licenses, and simulators often have installation barriers. This tool only requires Python. You don't need a board, a license, or a complex setup. This is a process of executing all 40 RV32I instructions without skipping a single one, discovering for yourself what the circuit needs to do.

If Season 1 was about checking your skills and solidifying the basics, Season 2 is intensive practical training focused solely on 'passing and career transitions.' Beyond simple syntax or gate-level design, you will directly design top-tier, high-difficulty modules (CDC, Synchronous/Asynchronous FIFO, AMBA APB, SPI, I2C, FIR filters, etc.) that frequently appear in coding tests and actual workflows at major corporations and foreign companies. Do you need solid design capabilities that won't waver even under a recruiter's relentless follow-up questions? This course contains all the practical know-how and ultimate coding test problems from ETA, who successfully moved from a regional university to a global semiconductor firm. In this final season, complete your career transition free pass.

This lecture implements a DDR Memory Arbiter.

In this course, students will learn how to implement Verilog using the Zynq board.

If you're preparing for a semiconductor (CHIP) circuit design role at Samsung Electronics, SK Hynix, LX Semicon, Hyundai Mobis, or a fabless company, you absolutely need to know 'this'!

This lecture implements a DDR Memory Arbiter.

UART is the most basic and widely utilized serial communication method, making it a very suitable learning topic for beginners new to FPGA design. In this course, we will thoroughly understand the communication principles and frame structure of UART, and based on this, we will proceed with directly implementing transmit/receive logic through RTL (Register Transfer Level) design. By implementing UART on an FPGA, you can systematically develop your digital circuit design skills and gain experience verifying its operation at the actual hardware level through simulation and verification. Furthermore, by learning the method utilizing the MicroBlaze soft processor and Xilinx UART IP, you will gain a broad understanding of processor-based system design flow and interface configuration. This will enable you to acquire comprehensive development capabilities encompassing both logic design and processor design.