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Design Self-Study Tastebi's Practical Verilog HDL Season 1 (From Clock to Internal Memory)

Let's gain basic knowledge and experience in non-memory semiconductor design using Verilog HDL with industry professionals.

(5.0) 148 reviews

1,644 learners

  • semisgdh
Verilog HDL
FPGA
Embedded

Reviews from Early Learners

What you will learn!

  • Basic knowledge of non-memory semiconductor design

  • Verilog HDL design and verification methods designed by industry professionals that cannot be learned in school

  • Design Basics for Getting Started with FPGA

  • Design knowledge needed in the field! (Don't just stand there)

Non-Memory Design Engineer's Guide to
Practical Verilog HDL: From Clock to Internal Memory!

Installation is the most difficult part.
I have no doubt that this environment will be helpful for your design career, so I ask those who have successfully installed it to register for the course. (Installation videos are freely available)
As I am a working professional, it's difficult to support all versions due to time constraints
Please install using the same version as shown in the installation video used in the lecture. Vivado 2020.1 ~ Vivado 2022.2 recommended
A tool is a tool. The design knowledge and code I will share with you are not affected by the tool version.

Check out the Matbi Universe roadmap for you who dream of becoming a non-memory design expert.
(Click on the image to go to the detailed roadmap page.)

Hello!
I'm Matbi from Design Self-Study.

Before taking the course, please read the document below! 👀
The content is somewhat lengthy, but please read it carefully and think it through thoroughly.

Essential Document for Seolgyedokhakmatbi's Verilog HDL Season 1 (Click)

This course was created over 8 months.
I can confidently say that this is a verified course with high view counts from the 'Design Self-Study YouTube Channel' that I directly operate.
* This video is currently private on YouTube and can only be taken through Inflearn.

📌What you can gain from the course

  • Non-memory design engineers can gain the fundamental knowledge and design confidence they need to have.
  • You can learn the essential knowledge needed for Verilog HDL design in real-world practice, not just in school.
  • This course lays the foundation for understanding the content needed for the next step and design of the corresponding lecture.
    (As a follow-up to this course, we are planning Verilog HDL Season 2 and FPGA. Season 1 is essential.)


📌Resources provided in the course

  • Unlimited Access
  • Verilog HDL Practice Code
  • We present tools and study methods that will allow you to self-study design for free in the future.
  • We use Vivado Xsim, a verified free Simulation Tool.Don't worry about licenses - run it to your heart's content at home.

If you become a non-memory design engineer in Korea 💪

As you know, Korea is a powerhouse in memory semiconductors. It is not a powerhouse in non-memory semiconductors.
The government and companies are making significant investments, and there are actually many design companies in the country.
Search for "Verilog HDL" keywords on job sites like Wanted, LinkedIn, Saramin, etc.
Many companies around the world are looking for semiconductor design engineers.
Is there a company you want to work for? Search for that company's salary.
For example, non-memory design-related companies on CreditJob are in the top 1% of average salaries for domestic companies.
It's a profession where you need to study as much as you earn, and it's not an easy path.

See you in the field 🖐

Thank you sincerely for reading this essential document.
If you've read this far, even if you don't take my course,
I'm confident that you will become excellent design engineers.
The choice is yours.
I look forward to meeting you in the field.

Thank you. From Matbi.

🎁 We're giving discount coupons to Design Self-Study Community members! 🥰

Join the Self-Study Design Community and receive discount coupons! Join Link (Click)

Recommended for
these people

Who is this course right for?

  • Those who have knowledge at the level of 2nd to 4th year of college electronics engineering.

  • Have you studied Verilog HDL language?

  • If you want to experience design practice

  • Those who wish to work in the non-memory design field

Need to know before starting?

  • C language

  • Verilog HDL

Hello
This is

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Answers

5.0

Rating

5

Courses

안녕하세요. 설계독학의 맛비입니다.

현) Global Top5 Fabless기업에서 HW IP 설계하고 있습니다.

세상에 없던 그리고 여러분들의 현업 생활에 도움이 되는, "진짜 반도체 설계 실무 강의"를 만들고 있습니다.

설계독학과 함께할 수 있는 링크입니다. 함께 즐공하고 성장해요!

Curriculum

All

43 lectures ∙ (7hr 34min)

Course Materials:

Lecture resources
Published: 
Last updated: 

Reviews

All

148 reviews

5.0

148 reviews

  • wntjd51282409님의 프로필 이미지
    wntjd51282409

    Reviews 1

    ∙

    Average Rating 5.0

    5

    80% enrolled

    There are external classes like IDEC or SW-SOC, but in the case of IDEC, since the two professors try to convey a lot of content concisely, there are many cases where it is difficult to understand. But you can't watch it again. In the case of SW-SOC, it's a seasonal system? You register for the lecture (I don't know why you have to register for the lecture when they just repeat what was taught before in the case of online lectures). They are either very job-related lectures or very simple lectures. Honestly, reading the book is more helpful. This person's lecture is explained based on example code from the perspective of a current employee, so it's understandable and it really helped me a lot when designing FPGAs. Highly recommended! Thank you, Matbi.

    • semisgdh
      Instructor

      Wow.. Thank you for the course review :) I know there were some shortcomings (it would be ridiculous if there were none), but I'm glad you understood. I'll try to cover things that aren't taught in school in the future. (It doesn't mean that school classes aren't important lol) Have fun :)

  • joshuahi0780님의 프로필 이미지
    joshuahi0780

    Reviews 1

    ∙

    Average Rating 5.0

    5

    100% enrolled

    I learned the basics of H/W design using Verilog and what direction to study. Thank you.

    • semisgdh
      Instructor

      Thank you for your class review, Joshua :) I think this is a lecture that covers the basics of the basics. There is still a long way to go (including me), but if you work hard with a positive mindset that learning a lot will give you competitiveness, I believe good things will happen. Enjoy the class!

  • mainc2469님의 프로필 이미지
    mainc2469

    Reviews 2

    ∙

    Average Rating 5.0

    5

    100% enrolled

    I enjoyed the lecture. I hope you continue to give great lectures in the future.

    • semisgdh
      Instructor

      Thank you very much for the course review :) This is a course review that encourages me to make better lectures.. I think so. It gives me strength. I hope Sangmin has a good day too. Always fun :)

  • elsl48694639님의 프로필 이미지
    elsl48694639

    Reviews 2

    ∙

    Average Rating 5.0

    5

    80% enrolled

    It took a whole day to install and I just registered and started listening, but I am really grateful that you uploaded a lecture on Verilog that I can listen to at any time. I think that this lecture is definitely worth 200,000-300,000 won, and I will definitely listen to the next lecture. If you happen to film all the FPGA roadmap lectures, I will also run to the end.!!

    • semisgdh
      Instructor

      Thank you very much for the course review! The process of coming up with the planned roadmap is a bit slow because I am working on the field at the same time. ㅠ However, I am doing my best for good quality, so please enjoy the next lecture. FPGA has already been released, so I think your skills will be doubled if you listen to it together. Enjoy!

  • aegisd85님의 프로필 이미지
    aegisd85

    Reviews 1

    ∙

    Average Rating 5.0

    5

    100% enrolled

    There is no substitute.

    • semisgdh
      Instructor

      Thank you very much for your review! If you enjoy this lecture with the mindset that it is not the end but the beginning, you will get good results. Enjoy it :)

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