inflearn logo
็Ÿฅ่ญ˜ๅ…ฑๆœ‰
inflearn logo

AIใƒ™ใƒผใ‚นใฎใ‚ขใƒŠใƒญใ‚ฐ/ใƒ‡ใ‚ธใ‚ฟใƒซๅ›ž่ทฏ่จญ่จˆ่‡ชๅ‹•ๅŒ–ๅฎŸๅ‹™ - ็พๅ ดใฎLDO/AXI-Lite IP่จญ่จˆใจๆคœ่จผ

ใ€Œใ‚ตใƒ ใ‚นใƒณ้›ปๅญใ€SKใƒใ‚คใƒ‹ใƒƒใ‚ฏใ‚นใฎ็พๅ ดใ€ใงๆฑ‚ใ‚ใ‚‰ใ‚Œใ‚‹ใ€ŒAIใƒ™ใƒผใ‚นใฎๅ›ž่ทฏ่จญ่จˆใƒปๆคœ่จผ่‡ชๅ‹•ๅŒ–ใ€ใฎๅฎŸๅ‹™่ฌ›็พฉใงใ™ใ€‚ TSMC 180nm PDKใƒ™ใƒผใ‚นใฎLDO IP่จญ่จˆใƒปๆคœ่จผ่‡ชๅ‹•ๅŒ– + AIใƒ™ใƒผใ‚นใฎAXI-Lite RTLๅฎŸ่ฃ… + Python/TCL/Batch Scriptใซใ‚ˆใ‚‹ใƒชใ‚ฐใƒฌใƒƒใ‚ทใƒงใƒณ่‡ชๅ‹•ๅŒ–ใฎใ‚นใ‚ญใƒซใ‚’็ฟ’ๅพ—ใ—ใพใ™ใ€‚

้›ฃๆ˜“ๅบฆ ไธญ็ดšไปฅไธŠ

ๅ—่ฌ›ๆœŸ้–“ ็„กๅˆถ้™

Python
Python
system-verilog
system-verilog
uvm
uvm
batch-script
batch-script
rtl
rtl
Python
Python
system-verilog
system-verilog
uvm
uvm
batch-script
batch-script
rtl
rtl

ใŠ็Ÿฅใ‚‰ใ›

ๆ–ฐใ—ใ„ใŠ็Ÿฅใ‚‰ใ›ใŒใ‚ใ‚Šใพใ›ใ‚“ใ€‚

๏ฟฅ37,610