設計独学맛비's 実戦 Verilog HDL Season 1 (クロックから内部メモリまで)

With the help of the design self-study taste-maker! Let's gain basic knowledge of FPGA and HW accelerator design experience.

Let's build AMBA AXI4 design and VIP verification experience, foundational to SoC Bus, through self-study of design with Verilog HDL!

Study the basics of AI hardware with Matbi. As a non-memory design expert, it contains essential knowledge for designing good AI HW.

It's time to have your design skills tested. The most important language in semiconductor circuit design... that's Verilog. Solve real problems from domestic and international circuit design interviews, and self-diagnose your Verilog skills. Verilog coding tests are now a must, not an option. Don't miss the practical tips from ETA, who started from a regional university and joined a foreign semiconductor company.

With the help of the design self-study taste-maker! Let's gain basic knowledge of FPGA and HW accelerator design experience.

This course introduces how to design a Gigabit Ethernet communication system using AMD FPGAs and TEMAC IP. In Vivado, we will generate and configure the TEMAC IP, connect it to the Top module, and design a hardware system capable of transmitting and receiving Ethernet frames at 1Gbps speed. We will also learn the basic concepts of the Ethernet protocol, frame structure, and debugging methods (ILA, Wireshark, etc.). We will design the ARP response and UDP transmission RTL and measure performance on a PC.

Want to learn the CORTEX-M processor in a systematic way? We will clearly explain the two most important topics in embedded systems: assembler and interrupts.

This lecture allows you to learn Circuit/PCB design, Stm32 firmware, and BLDC motor control simultaneously. This lecture involves directly designing a 3-phase inverter and operating an electric kickboard.

In this course, students will learn how to implement Verilog using the Zynq board.

This lecture implements a DDR Memory Arbiter.

This lecture implements DDR Memory Arbiter.

UART is the most basic and widely utilized serial communication method, making it a very suitable learning topic for beginners new to FPGA design. In this course, we will thoroughly understand the communication principles and frame structure of UART, and based on this, we will proceed with directly implementing transmit/receive logic through RTL (Register Transfer Level) design. By implementing UART on an FPGA, you can systematically develop your digital circuit design skills and gain experience verifying its operation at the actual hardware level through simulation and verification. Furthermore, by learning the method utilizing the MicroBlaze soft processor and Xilinx UART IP, you will gain a broad understanding of processor-based system design flow and interface configuration. This will enable you to acquire comprehensive development capabilities encompassing both logic design and processor design.

We explain the core basic knowledge that you need to know for developing AUTOSAR-based vehicle software in a way that even beginners can understand, from the most basic concepts to very detailed information.