MetaEncore's Courses - Inflearn

MetaEncore

@metaencorehr

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164

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4.7

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Courses

Total 10

2주 챌린지
모집 마감 D-14
[2-Week Synthesis Practice Challenge 7th Batch] Experience RTL Synthesis in a Professional Environment (Synopsys Design Compiler)
MetaEncore
모집중
2주 챌린지
모집 마감
[2-Week Synthesis Practice Challenge Batch 6] Experience RTL Synthesis in a Professional Environment (Synopsys Design Compiler)
MetaEncore
종료
2주 챌린지
모집 마감
[2-Week Synthesis Practice Challenge Round 5] Experience RTL Synthesis in a Professional Environment (Synopsys Design Compiler)
MetaEncore
종료
2주 챌린지
모집 마감
[2-Week Synthesis Practice Challenge 4th Class] Experience RTL Synthesis in a Professional Environment (Synopsys Design Compiler)
MetaEncore
종료
2주 챌린지
모집 마감
[2-Week Synthesis Practice Challenge 3rd Batch] Experience RTL Synthesis in a Professional Environment (Synopsys Design Compiler)
MetaEncore
종료
Basic UVM Testbench (Circuit Design Verification)
Through this course, you will understand the UVM Class library and learn testbench design techniques using UVM.
초급
Verilog HDL, system-verilog, uvm
Basic UVM Testbench (Circuit Design Verification)
2주 챌린지
모집 마감
[2-Week Synthesis Practice Challenge Season 2] Experience RTL Synthesis in a Professional Environment (Synopsys Design Compiler)
MetaEncore
종료
2주 챌린지
인원 마감
[2-Week Synthesis Practice Challenge 1st Cohort] Experience RTL Synthesis in a Real-World Environment (Synopsys Design Compiler)
MetaEncore
종료
Basic Design Synthesis Training (Digital Circuit Design Implementation)
Through what stages are semiconductor chips designed and manufactured? We will examine the basic concepts of logic circuits and the Chip Design Flow required for PI (Physical Implementation) / PD (Physical Design) roles step-by-step, and explore the key concepts of the synthesis process based on the tools used for digital chip circuit design in the industry.
입문
EDA, digital-logic, vlsi
Basic Design Synthesis Training (Digital Circuit Design Implementation)
Basic SystemVerilog Testbench (Circuit Design Verification)
You will learn the basic syntax of SystemVerilog and testbench design techniques using SystemVerilog classes. Additionally, you can experience and learn the complete basic cycle of hardware circuit design verification by utilizing VCS, an EDA Tool from Synopsys used in the industry. Related search terms SystemVerilog, SystemVerilog, SystemVerilog, Verilog, Verilog, Verilog, SOC, circuit design, circuit verification, verification, Verification, chip design, chip verification, Samsung Electronics, Hynix, new employee training, in-house training, Synopsys, VCS, semiconductor, employment, career, fabless
초급
Verilog HDL, system-verilog, verification
Basic SystemVerilog Testbench (Circuit Design Verification)