Basic Design Synthesis Training (Digital Circuit Design Implementation)

Synthesis

What is Synthesis?

• Converting a Register Transfer Level design written in HDL such as Verilog to Gate Level

• The process optimizes the Design according to constraints called Synopsys Design Constraints

• Finally mapping to standard cells provided by the Foundry

  
  

Learning Synthesis: The Beginning of Digital Circuit Design Implementation

The beginning of the digital circuit design implementation phase - proper understanding is essential to complete the chip.

Synthesis is the first gateway connecting the abstract stage and the physical stage.
Ultimately, understanding synthesis means understanding the entire circuit design process.
In the industry, new employees with synthesis and timing verification experience are preferred.
However, related tools are expensive and have low accessibility, making it difficult to study in school or through self-study.
In this course, you can experience the synthesis process based on Design Compiler used in the industry step by step,
and it explains not only synthesis but also many concepts used in circuit implementation positions.

What is covered in the synthesis lecture

• Section 1. Fundamental Digital Logic Circuit concepts required for synthesis

  • Digital System

  • Timing Concepts

• Section 2. Detailed Understanding of Digital Chip Design Flow

  • SoC / ASIC

  • Physical Implementation (Front-End) / Physical Design (Back-End) Flow

• Section 3. Understanding synthesis using Synopsys Design Compiler, the most widely used synthesis tool in practice

  • Design Setup

  • Synopsys Design Constraints (SDC)

  • Synthesis Techniques

  • Timing Analysis

    
    

What you will gain from the synthesis lecture

• Preparation process required for synthesis

• Understanding SDC commands for Design optimization

• Timing Concepts and Analysis

• Various Techniques in the Compile Process

• Understanding terminology used in practice

Prerequisites

• Since this is a process of mapping Digital Design to Gates with "physical substance," the following prerequisite knowledge is required

  • Digital logic circuits

  • CMOS Operating Principles

  • Basic knowledge of the Verilog language

• Linux environment

  • It's not essential for the lecture content, but in practice, everyone uses a Linux environment.

• TCL for communicating with EDA tools

  • Similarly, it's not required, but it's good to study it whenever you have time.

    
    

Reference sites for study materials related to the lecture

• TCL, the most widely used scripting language in the PI/PD field

  • https://tcltk.co.kr

Hands-on Challenge Course in Progress

• Want to try hands-on practice after taking the course?

  • Inflearn Challenge Course [2-Week Synthesis Practice Challenge] is currently running (5 people per session, first-come-first-served)

  • This is a great opportunity to use Synopsys' Design Compiler.