Fundamentals of FPGA

Introduction to the course

This course covers the basic concepts of the structure and design flow of FPGAs (Field-Programmable Gate Arrays) , and covers the two axes of interface design and algorithm design that constitute the design from a practical perspective. This is an introductory course for those who want to systematically learn FPGA design, from beginners to practitioners.

Also, FPGA design is essentially similar to the front-end process of ASIC design. Therefore, it is a good preparation process for entering ASIC design . In fact, it is common to perform prototyping with FPGA at the beginning of an ASIC project, and this common ground is also why there are many engineers who are skilled in both ASIC and FPGA.

Learning Objectives

• Understand what FPGAs are and why they are used.

• Learn the FPGA design flow step by step.

• Identify key elements of interface design (clocks, I/O, memory, high-speed communications, etc.).

• Understand the concepts of designing algorithms and parallel processing structures (DSP, LUT, pipelining, FSM, etc.).

• Understand how to configure the system in an integrated manner and what to watch out for.

• Understand FPGA development tools and learn how to install AMD FPGA development tools.

• Learn how to use FPGA internal components such as CLB, memory blocks, and DSP.

What is an FPGA?

FPGA (Field Programmable Gate Array) is an abbreviation for "field programmable gate array" and is a semiconductor chip that allows users to freely configure the hardware circuit structure.

• Reconfigurability: the ability to reprogram hardware circuits to suit the desired behavior.

• Applications: Communication, signal processing, artificial intelligence, robot control, high-speed interface, etc.

• Components: Logic Block, LUT, Flip-Flop, Clock Network, Block RAM, DSP Slice, etc.

FPGA Design Flow

1. Requirements definition

   • Clearly define the functions, performance, and input/output conditions to be implemented

2. RTL design

   • Design in a hardware description language such as Verilog HDL, system-verilog, or VHDL

3. Functional Simulation

   • Verify that the design logic meets requirements through simulation

4. Synthesis

   • Convert RTL code into actual gate-level circuits

5. Place & Route

   • Design placement on FPGA's actual resources (LUT, FF, DSP, etc.)

6. Bitstream Generation

   • Generating configuration data that the FPGA can recognize

7. Programming and Debugging

   
   

   • Download to FPGA, check operation, modify if necessary

FPGA Design Subfields

1. Interface design

   • Understanding of input/output I/O and buffers, clock structures, Gigabit Transceiver, and Memory Interface is required.

     
     

2. Algorithm and Parallel Processing Design

   • DSP utilization, Custom Logic design, FSM design

   • Pipelining and parallel processing design are key.

FPGA Design Tools

1. Design tools from major device manufacturers

   1. AMD FPGA: Vivado, Vitis

   2. Intel FPGA: Quartus

2. Key Features

   1. HDL code writing/simulation/synthesis

   2. Setting design constraints (XDC, SDC, etc.)

   3. Timing Analysis and Bitstream Generation

   4. On-chip Debugging

3. Vivado + Vitis Workflow

   1. Vivado: Hardware Design

   2. Vitis: Software Design

      
      

Installing Vivado

1. Vivado and Vitis are the basic tools required for AMD FPGA development.

2. You need to create an account on the AMD Site and download the version you want.

   1. The Standard version is free to use, but support for some devices is limited.

   2. The larger the logic size of the device, the larger the memory capacity required for the PC.

3. installation

   1. Requires 100GB or more of hard disk space.

   2. It takes 1~2 hours or more.

LED Blinking (Example)

1. Using system-verilog, clock division, and RTL, design an LED that toggles at 1-second intervals.

2. Create a test bench and run the simulation.

3. Specify constraints in the XDC file.

4. Synthesis and Implementation in progress.

5. Add debugging signals to ILA.

6. FPGA programming and testing.

FPGA Internal Components

1. CLB (Configurable Logic Blocks)

2. Memory

3. DSP