Armv7-A Architecture Overview for Junior Developers (Taught by the Author)

<Notice>

Arm Architecture Full Author-Led Lecture Roadmap

This course <Armv7-A Architecture for New Developers (Author's Direct Lecture)> is included in the roadmap 'Arm for System Software Developers - basic course' .

If you wish to learn the Arm architecture (Armv8-A, Armv7-A) systematically, it is recommended to use the roadmap (30% discount on all lectures). For your reference, the Arm Architecture Roadmap (complete author-led series) consists of two parts: Basic Course and Advanced Course .

In modern system software,
the most important Arm architecture

CPUs running in most devices, excluding desktop computers, are Arm processors. For a long time, the Arm architecture has been a must-learn topic for embedded developers. The popular Arm architectures can be broadly classified into Armv7-A and Armv8-A. Among these, 32-bit based (Armv7-A) Arm processors (Cortex-A9, Cortex-A15) are still being used in many diverse product lines (digital TVs, IoT devices, electric vehicles-autonomous driving, telematics).

If you are learning the Armv7 architecture for the first time?

If you are a learner studying the Arm architecture for the first time, you may feel overwhelmed by the vast amount of content. Additionally, job seekers or junior developers often need to prepare for technical interviews quickly within 1 to 2 weeks. This lecture has been structured with an optimal curriculum so that beginners in the Arm architecture can master core concepts in a short period of time.

Of course, a deep learning process is important to systematically learn the Arm architecture. In fact, the book I authored, <The Structure and Principles of Arm Architecture>, and the full-course lectures (totaling 60 hours) below have been chosen by many students.

🔹 If you want to learn systematically, please pay attention to the lectures below!

• <The Structure and Principles of Arm Architecture> - Authored Book

• Structure and Principles of Arm Architecture - Part 1 (22 hours)

• Structure and Principles of Arm Architecture - Part 2 (20 hours)

• Arm Architecture Advanced Course (21 hours)

  
  

Target Audience 💁‍♂

I have created this course—Armv7-A Architecture Overview—for the following prospective students.

What makes this lecture different ⭐

If you master this course, you will be able to grow into an advanced system software developer.

I am rooting for you to upgrade your career with a higher salary and position.

You will learn these things 📕

We introduce the Arm processor while explaining the process of developing system semiconductors. We also introduce the basic functions that make up the Armv7-A architecture.

It explains the structure of registers and provides a detailed, easy-to-understand explanation of how registers are configured in the Armv7-A architecture.

We will cover the CPSR and SPSR registers, which are the core components among the registers that make up the Armv7-A architecture, in great detail. We will provide easy-to-understand explanations for each field that constitutes these registers.

It explains the basic structure of general-purpose registers in an easy-to-understand way through hands-on practice with the TRACE32 program.

We explain the relationship between the CPSR register values and processor modes in detail through TRACE32 debugging.

It explains why you need to know assembly instructions well with various examples (such as bootloaders). It also explains how assembly instructions are utilized in real-world projects.

We analyze the basic format of assembly instructions defined in the Armv7-A architecture and examine example instruction routines.

We analyze assembly instructions in detail through various methods and explain the operation of each instruction in an easy-to-understand manner.

I will explain the operation of assembly instructions in detail while debugging directly with the TRACE32 program.

Introducing processor modes, the core of the core of the Armv7-A architecture. It explains the concept of Privilege Levels associated with processor modes in a specific and easy-to-understand manner.

It explains the characteristics of each processor mode supported by Armv7-A and covers User mode. It provides a detailed explanation of what software actually runs in User mode.

It explains the Supervisor mode, where RTOS or the Linux kernel runs, in detail. It also provides specific explanations on how Supervisor mode is utilized in real-world projects.

Explains the basic operating principles of exceptions and reviews the exception vector table defined in Armv7-A.

Explains the exception handling process in Armv7-A in detail, step by step.

We will analyze in detail how actual exceptions are processed from a software perspective. We will also provide detailed explanations of the relevant assembly instructions and the exception vector table.

Explains from a software perspective how IRQ interrupt exceptions are handled in Armv7-A.

Through debugging practice with the TRACE32 program, we explain in an easy-to-understand manner how an exception is triggered when the SVC instruction is executed.

While directly practicing the Undefined Instruction exception using the TRACE32 program, the operational principles of the exception are explained in detail.

I will introduce why you should learn the AAPCS (Arm Procedure Call Standard), which is the convention for branching to subroutines such as functions. I will also explain its basic operating principles in an easy-to-understand manner.

We introduce the registers related to AAPCS. We explain which registers are used to store the arguments passed to functions and their return values.

We will explain the operating principles of AAPCS in an easy-to-understand manner by practicing BL, B, and BLX instructions directly using the TRACE32 program.

Explains the core concepts of TrustZone (Non-secure World, Secure World) and the execution flow in an easy-to-understand manner.

It explains in detail how the SMC instruction, which is the core of TrustZone, operates.

It explains the basic concepts of the memory model and what normal memory is in an easy-to-understand way.

Explains the concept of memory reordering and the memory barriers provided by Armv7-A in detail.

Explains the components that make up the virtual memory system and the execution flow through which virtual addresses are processed.

Based on my experience in book writing and lecturing,
deeper and more detailed than anyone else!

In the domestic system software field, I am the unprecedented author who has written books on both 'Arm Architecture (Armv8-A, Armv7-A)' and the 'Linux Kernel'. I am also an active developer who is well-versed in the latest system software trends (electric vehicles, system semiconductors - system software), and an educator who is most actively engaged in spreading knowledge within the system software field.

• Author of 'Structure and Principles of Arm Architecture for System Software Development' (2024, National Academy of Sciences Outstanding Book Award)

• Author of 'The Structure and Principles of the Linux Kernel Learned Through Debugging' (2021, National Academy of Sciences Outstanding Scholarly Book Award))

• 'Programmers Dev Course: Linux System and Kernel Expert' Main Instructor (1st~2nd cohorts)

  
  

• LG Electronics 'Linux Kernel' and 'Armv8 Architecture' internal instructor (including domestic and overseas developers) - (2020–2024)

I can confidently say that I am an educator who can explain the key features of the Armv7-A architecture better than anyone else in Korea.

Vivid course reviews left by learners

<Structure and Principles of Arm Architecture for System Software Development - Part 1/2 Author's Lecture>

Notes before taking the course