
Verilog FPGA Program 5 (Serdes)
alex
$63.80
Intermediate / FPGA, verilog
5.0
(6)
Implement LVDS (Serdes) in FPGA.
Intermediate
FPGA, verilog
This course is an advanced Microblaze course. Through this course, you can learn how to apply Microblaze.


Reviews from Early Learners
5.0
mjs1004
I think it's structured in a way that's suitable for practical application. Thank you always!
5.0
jblee3
This is helpful information for practical use.
5.0
haneuli
I started FPGA late ㅠㅠ Thank you for opening this kind of information like Danbi! I'm really happy that the feeling of being lost has been resolved since I started studying from scratch~
Using MicroBlaze in FPGA
Verilog program
W5500 interface implementation
FPGA MicroBlaze, so daunting to study!
You can conquer it with this course 💪
📢 Please read before taking the course.
This course is the MicroBlaze Application version. The MicroBlaze Basic version focused on understanding and utilizing the fundamental aspects of MicroBlaze. In this Application version, based on utilizing Block Memory, we explain the implementation of high-speed TCP/IP using w5500. It covers implementing and utilizing the interface between user logic and MicroBlaze.
This course uses vivado 2022.1 version. Details regarding installation are explained in depth in the Microblaze Basic Edition. This course consists of content directly implemented and verified on the Arty A7 board by a developer with over 20 years of experience. If you thoroughly study the contents explained in the lecture and make them your own, you can become a very capable developer. The source code downloaded from the archive is high-level code that can be used in professional practice without any issues. I hope many people in the field will find it useful.
1️⃣
Those who understand Verilog syntax and
have experience in FPGA design
2️⃣
Those with experience in embedded system (FW)
development
Vivado Design Block Implementation
User logic Design and Simulation
Vitis Application SW Implementation
Board Download and Result Verification
Q. Who is the target audience for this lecture?
This course is intended for those who understand Verilog syntax, have experience in FPGA design, and have experience in embedded system (FW) development. If you are new to Microblaze, we recommend taking the introductory course before enrolling in this one.
Q. Are there any preparations needed to take the course?
This course is conducted using the Arty A7-35T (100T, by Digilent) practice board. If you do not have the board ready, please watch the content first and make sure to purchase the board later to verify it on the actual hardware.
Q. What programming tool is used?
We use the latest version, Vitis 2022.1. The installation process is introduced in detail in the Microblaze basic lecture.
I have worked as a developer for over 20 years at both large corporations and SMEs, and I am currently running a small business. I have developed ISP (Image Signal Processing) ASICs for CCTV and numerous products using FPGAs, such as OLED inspection equipment and DAQ (Data Acquisition Systems). In addition to FPGAs, I have extensive experience in FW development (STM32, PIC32, AVR, ATMEGA, etc.), circuit design, and Windows programming.
Who is this course right for?
Anyone interested in MicroBlaze
Those who are interested in FPGA
Anyone interested in Verilog
Those who wish to learn advanced Verilog techniques
Need to know before starting?
C Language
Verilog HDL
Xilinx FPGA
Career Verified
1,791
Learners
96
Reviews
134
Answers
4.8
Rating
17
Courses
I have worked as a developer at both large corporations and SMEs for the past 20 years,
I am currently the CEO of a small company.
Key career highlights include
FPGA design using Verilog HDL
ISP ASIC development for CCTV (approx. 10 years)
OLED Display inspection equipment development (approx. 3 years)
Equipment development using FPGA
MCU FW
STM32
PIC32
AVR, ATMEGA
DSP (TI)
Windows Application Development
Visual Studio MFC, C++
.
All
121 lectures
Course Materials:
All
3 reviews
5.0
3 reviews
Reviews 15
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Average Rating 5.0
5
I started FPGA late ㅠㅠ Thank you for opening this kind of information like Danbi! I'm really happy that the feeling of being lost has been resolved since I started studying from scratch~
Thank you for your course review. I remember feeling lost when I first encountered FPGA and Verilog. I understood the theory, but I think I realized little by little what it actually meant while working. I am grateful that the course helped you, and I hope you become a great developer. Thank you ~!!
Reviews 5
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Average Rating 5.0
Edited
Reviews 3
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Average Rating 5.0
5
This is helpful information for practical use.
Thank you for your course review~!!
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