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設計独学맛비's 実戦 Verilog HDL Season 1 (クロックから内部メモリまで)

実務者と一緒に Verilog HDL を使用して、非メモリ半導体の設計の基本的な知識と経験を積んでみましょう。

（5.0）受講レビュー 150件

受講生 1,651名

  • semisgdh
Verilog HDL
FPGA
Embedded

学習した受講者のレビュー

こんなことが学べます

  • 非メモリ半導体設計の基本知識

  • 学校では学べない、実務者が設計した Verilog HDL 設計および検証方法

  • FPGA を始めるための設計基礎知識

  • 現場で必要な設計知識！ (ボーっとしないでください)

非メモリ設計エンジニアが教える
実戦 Verilog HDL: Clockから Internal Memoryまで!

インストールが最も困難です。
該当環境は皆様の設計人生に役立つことは間違いないので、インストールに成功された方は受講申請をお願いいたします。（インストール動画は無料公開中）
現業者のため、時間的にすべてのバージョンをサポートするのが困難で
講義で使用したインストール動画のバージョンに合わせてインストールをお願いいたします。vivado 2020.1 ~ vivado 2022.2 推奨
toolはtoolです。皆様にお伝えする設計知識とコードはtoolバージョンに影響されません。

非メモリ設計専門家を夢見るあなたのための
マッビユニバースロードマップを確認してみてください。（図をクリックすると詳細ロードマップページに移動します。）

こんにちは！
設計独学のマッビです。

受講前に必ず！下記の文書をお読みください。👀
内容が少し長いですが、丁寧に読んで慎重に検討してみてください。

設計独学マスビのVerilog HDL Season 1必読文書（クリック）

この講義は8ヶ月をかけて作られました。
直接運営している「設計独学YouTubeチャンネル」で高い再生数を通じて検証された講義だと自信を持って申し上げることができます。
* 該当動画は現在YouTubeでは非公開状態であり、Inflearnを通してのみ受講可能です。

📌講義を通じて得られるもの

  • 非メモリ設計エンジニアが身につけるべき基本知識と設計の自信を得ることができます。
  • 学校ではなく実務でVerilog HDL設計時に必要な必須知識を学ぶことができます。
  • この講義の次のステップ、設計に必要な内容を理解するための基礎を築きます。
    （本講義に続く後続編として、Verilog HDL Season 2とFPGAを企画しています。Season 1は必須です。）


📌講義で提供するリソース

  • 無制限受講
  • Verilog HDL 実習コード
  • 皆さんが今後無料で設計を独学できるToolと勉強方法を提示します。
  • 検証済みの無料Simulation ToolであるVivado Xsimを使用します。ライセンスを気にせず、自宅で思う存分動かしてみてください。

韓国で非メモリ設計エンジニアになったら 💪

ご存知の通り韓国はメモリ半導体強国です。非メモリ半導体強国ではありません。
政府と企業が多くの投資を行っており、実際に国内には多くの設計会社があります。
就職サイトであるWanted、LinkedIn、サラムイン等で「Verilog HDL」キーワードを検索してみてください。
世界中の多くの会社が半導体設計エンジニアを探しています。
行きたい会社はありますか？その会社の年収を検索してみてください。
クレディットジョブで非メモリ設計関連会社を例に挙げると、国内企業平均年収上位1%です。
もらう分だけ勉強しなければならない職業で、簡単な道ではありません。

現場でお会いしましょう 🖐

必読文書を読んでいただき、心より感謝いたします。
ここまで読まれた方は、私の講義を受講されなくても、
皆さんは素晴らしい設計エンジニアになられると確信しています。
選択は皆さん次第です。
皆さんと現場でお会いできることを楽しみにしています。

ありがとうございます。マッビより。

🎁 設計独学コミュニティ会員の皆様に割引クーポンをプレゼントします！🥰

設計独学コミュニティに参加して、割引クーポンをもらいましょう！参加リンク（クリック）

こんな方に
おすすめです

学習対象は
誰でしょう？

  • 大学電子科2～4年生レベルの知識を備えた方。

  • Verilog HDL 言語を勉強したことがある方

  • 設計実務を経験したい方

  • 非メモリー設計分野で就職を希望される方

前提知識、
必要でしょうか？

  • C言語

  • Verilog HDL

こんにちは
です。

4,078

受講生

316

受講レビュー

1,274

回答

5.0

講座評価

5

講座

안녕하세요. 설계독학의 맛비입니다.

현) Global Top5 Fabless기업에서 HW IP 설계하고 있습니다.

세상에 없던 그리고 여러분들의 현업 생활에 도움이 되는, "진짜 반도체 설계 실무 강의"를 만들고 있습니다.

설계독학 로드맵과 함께 여러분들의 실력을 키워보아요.

설계독학과 함께할 수 있는 링크입니다. 함께 즐공하고 성장해요!

カリキュラム

全体

43件 ∙ (7時間 34分)

講座資料（こうぎしりょう）:

授業資料
講座掲載日: 
最終更新日: 

受講レビュー

全体

150件

5.0

150件の受講レビュー

  • wntjd51282409님의 프로필 이미지
    wntjd51282409

    受講レビュー 1

    ∙

    平均評価 5.0

    5

    80% 受講後に作成

    There are external classes like IDEC or SW-SOC, but in the case of IDEC, since the two professors try to convey a lot of content concisely, there are many cases where it is difficult to understand. But you can't watch it again. In the case of SW-SOC, it's a seasonal system? You register for the lecture (I don't know why you have to register for the lecture when they just repeat what was taught before in the case of online lectures). They are either very job-related lectures or very simple lectures. Honestly, reading the book is more helpful. This person's lecture is explained based on example code from the perspective of a current employee, so it's understandable and it really helped me a lot when designing FPGAs. Highly recommended! Thank you, Matbi.

    • semisgdh
      知識共有者

      Wow.. Thank you for the course review :) I know there were some shortcomings (it would be ridiculous if there were none), but I'm glad you understood. I'll try to cover things that aren't taught in school in the future. (It doesn't mean that school classes aren't important lol) Have fun :)

  • joshuahi0780님의 프로필 이미지
    joshuahi0780

    受講レビュー 1

    ∙

    平均評価 5.0

    5

    100% 受講後に作成

    I learned the basics of H/W design using Verilog and what direction to study. Thank you.

    • semisgdh
      知識共有者

      Thank you for your class review, Joshua :) I think this is a lecture that covers the basics of the basics. There is still a long way to go (including me), but if you work hard with a positive mindset that learning a lot will give you competitiveness, I believe good things will happen. Enjoy the class!

  • mainc2469님의 프로필 이미지
    mainc2469

    受講レビュー 2

    ∙

    平均評価 5.0

    5

    100% 受講後に作成

    I enjoyed the lecture. I hope you continue to give great lectures in the future.

    • semisgdh
      知識共有者

      Thank you very much for the course review :) This is a course review that encourages me to make better lectures.. I think so. It gives me strength. I hope Sangmin has a good day too. Always fun :)

  • elsl48694639님의 프로필 이미지
    elsl48694639

    受講レビュー 2

    ∙

    平均評価 5.0

    5

    80% 受講後に作成

    It took a whole day to install and I just registered and started listening, but I am really grateful that you uploaded a lecture on Verilog that I can listen to at any time. I think that this lecture is definitely worth 200,000-300,000 won, and I will definitely listen to the next lecture. If you happen to film all the FPGA roadmap lectures, I will also run to the end.!!

    • semisgdh
      知識共有者

      Thank you very much for the course review! The process of coming up with the planned roadmap is a bit slow because I am working on the field at the same time. ㅠ However, I am doing my best for good quality, so please enjoy the next lecture. FPGA has already been released, so I think your skills will be doubled if you listen to it together. Enjoy!

  • aegisd85님의 프로필 이미지
    aegisd85

    受講レビュー 1

    ∙

    平均評価 5.0

    5

    100% 受講後に作成

    There is no substitute.

    • semisgdh
      知識共有者

      Thank you very much for your review! If you enjoy this lecture with the mindset that it is not the end but the beginning, you will get good results. Enjoy it :)

￥30,373

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