Verilog FPGA Program 5 (LVDS/Serdes, HIL-A35T)



hello.

It was stopped a while ago
Downloading electronic documents (pdf files) is now possible again.
Those who purchased the course from Infraon
Please download and use electronic documents from the data room.

Thank you~!!



hello.

The Verilog FPGA Program 5 (LVDS/Serdes, HIL-A35T) lecture has been updated.
Added content to implement maximum transfer speeds.

Please download the data from the data room and use it.
I hope you find this lecture informative.

Thank you~!!

To celebrate the new semester, we are holding a discount event for individual course purchases.
I hope this will be a good opportunity for those who want to learn Verilog and FPGA.

1. Discount event for lectures related to Verilog and FPGA

♣ 25% discount on lectures
♣ Period: 2024. 02. 29 ~ 2024. 03. 17
♣ Purchase from Infleun using the discount coupon below

2. HIL-A35 Development Board Discount Event

♣ 15% discount on development boards
♣ Period: 2024. 02. 29 ~ 2024. 03. 17
♣ Smart Store: https://smartstore.naver.com/ihil

Thank you~!!