When I was working on MCU, I didn't have much trouble with RAM (because there are abundant resources these days). However, as I was studying HW while working on FPGA or Zynq, I started to worry about RAM and had a lot of difficulties. This lecture was a great help. Please continue to provide good lecture materials~!

neulha

Through this lecture, you will be able to implement a DDR controller using FPGA.

ihil

배움이 더 쉬워지는 9월의 할인

Verilog FPGA Program 3 (DDR Controller, Arty A7-35T)

Thank you for your course review. The MCU environment and the FPGA development environment seem to be very different. Maybe they are different worlds. Thank you for helping me with the course. I hope you become a happy and capable developer. Thank you ~!!

verilog

베릴로그

fpga

강의을 통하여 FPGA를 이용한 DDR Controller를 구현할 수 있습니다.

alex

입문

초급

중급이상

필드 프로그래머블 게이트 어레이

FPGA

개요

HW 구성

DDR Controller IP 생성

Simulation

User Interface Logic 구현

DDR3 Memory Access 속도

Frame Buffer 구현

32Bits Interface 구현

Spartan6 DDR Controller 구현

DDR4 Controller 구현

기타