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Verilog FPGA Program 3 (DDR Controller, Arty A7-35T)

Through this lecture, you will be able to implement a DDR controller using FPGA.

(5.0) 7 reviews

126 learners

Level Intermediate

Course period Unlimited

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verilog
FPGA
FPGA
verilog
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FPGA
FPGA

Lecture Updates

The lecture has been updated.

  • Lecture Name: FPGA MicroBlaze Implementation

  • Update Contents: Chapters 4 and 5 have been updated.

Those who purchased the lecture, please download it from the data room.

In the future, the entire content of the "FPGA MicroBlaze Implementation" lecture will be continuously updated.

Thank you~!!

 

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