This is a really great course. For other self-study design courses, access is unlimited, so I watch them when I have free time. However, this current AXI-related course for me is expiring soon... I was wondering if I could watch it whenever I have time for about 6 more months... Sir, could I please ask if it's possible to extend the course access period? I would really appreciate it. ^^;;...

kyw05314441

Let's build AMBA AXI4 design and VIP verification experience, foundational to SoC Bus, through self-study of design with Verilog HDL!

semisgdh

인프런 10주년! 사랑주간 전체 할인

Design Self-Study Flavor's Practical Verilog HDL Season 2 (Complete Mastery of AMBA AXI4)

Thank you for your course review!
Extensions are not possible by policy, so please understand this point.
It's great that you enjoyed taking it. Happy studying!

Yes, yes!! I diligently took the AMBA course and have now completed it, and as I diligently followed along with the practical exercises, I've really come to understand AMBA at least roughly. Thank you, Teacher. Today is Teacher's Day. Please be happy today too, Teacher Matbi~ Thank you~

반도체

verilog

fpga

amba

임베디드

입문

초급

중급이상

베릴로그 HDL

Verilog HDL

필드 프로그래머블 게이트 어레이

FPGA

Embedded

Before starting 설계독학맛비's Verilog HDL Season2

Mastering Valid/Ready Handshake Design, Fundamental to Data Transmission

Mastering Essential Buffer and FIFO Design for Smooth Data Transfer

Mastering theory and verification environment for AXI4 Interface design

Mastering AXI4-Lite Design

Mastering AXI4-Stream Design

Conquering AXI4 Design (feat. things every design engineer must know!!)

Memory copy IP. Designing DMA (Direct Memory Access).

[Project] Let's port ""Matbi Mem copy IP"" onto FPGA! (Operation and Performance Check)

Concluding