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theseoultech991744님의 프로필 이미지
theseoultech991744

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Reviews 2

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Average rating 5.0

Completed 100% of course

I have completed the third of four lectures in the Taste Bee Roadmap. My original goal was to install an AI inference engine on an FPGA board, but I ended up studying the AI H/W accelerator needed to run the model. I unexpectedly gained a really deep insight, and I also gained valuable information that I need to consider carefully when installing the AI inference engine. I look forward to the next fourth lecture. Thank you.

semisgdh님의 프로필 이미지
semisgdh
Instructor

Wow... Thank you for listening to the lecture from beginning to end. Of course, I don't think you can learn everything from just one lecture. I think there will be a lot to learn by experiencing it yourself. The fourth lecture was also made for a long time. Enjoy it. Have fun learning!

Design Self-study Taste's Bible for Practical AI HW Design, Complete Conquest of CNN Operations (Accelerator Practice Using Verilog HDL + FPGA) thumbnail
semisgdh

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25 lectures

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623 students

Design Self-study Taste's Bible for Practical AI HW Design, Complete Conquest of CNN Operations (Accelerator Practice Using Verilog HDL + FPGA)
5.0(23 reviews)
View course details
5.0(23 reviews)
Design Self-study Taste's Bible for Practical AI HW Design, Complete Conquest of CNN Operations (Accelerator Practice Using Verilog HDL + FPGA)
semisgdh

·

25 lectures

·

623 students

Design Self-study Taste's Bible for Practical AI HW Design, Complete Conquest of CNN Operations (Accelerator Practice Using Verilog HDL + FPGA) thumbnail
Design Self-study Taste's Bible for Practical AI HW Design, Complete Conquest of CNN Operations (Accelerator Practice Using Verilog HDL + FPGA) thumbnail
5.0(23 reviews)
Design Self-study Taste's Bible for Practical AI HW Design, Complete Conquest of CNN Operations (Accelerator Practice Using Verilog HDL + FPGA)
semisgdh

·

25 lectures

·

623 students