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Embedded IoT

STM32 FreeRTOS Implementation

We will explain in detail how to implement FreeRTOS on STM32 MCU.

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164 students

FreeRTOS

50% off event to celebrate 1 month of launch

hello.

I would like to express my sincere gratitude to those who purchased the course.

I hope this lecture will be of great help to developers.

I think it's been about a month since the course opened.

To express our gratitude, we are holding a 50% discount coupon event.

  • Period: 2022. 11. 28 - 2022. 12. 02 (5 days)

  • Coupon details: 50% off

 

This is content related to the FPGA MCU Porting lecture.

There are many advantages to porting an MCU to an FPGA.

This lecture covers in detail how to port and use MCU on FPGA.

I have applied it to almost every project I have developed using FPGAs over the past 15 years.

Development has been in progress.

When developing with FPGA, there are some parts that must be implemented with MCU.

Using an MCU can also be a great help in debugging by changing various parameters inside the FPGA.

When I was developing FPGA

  • FPGA Logic

  • MCU FW

  • Windows Program

We implement these three things.

Developing this way makes debugging faster and allows you to implement the entire system by yourself.

This lecture explains these aspects in detail.

For developers, having their own solutions has huge advantages.

If you purchase this course, you will receive all related materials.

  • FPGA RTL Source (including MCU IP)

  • FW Source (Bootloader, Application)

  • Windows Program (Download Application FW, change parameters implemented in RTL, etc.)

  • Flash module (save application fw, save user/system data): After purchasing the course, please let us know your address and we will send it to you by courier.

You can receive lecture materials (electronic documents, pdf) in advance from the cafe ( https://cafe.naver.com/worshippt/179 ). It will be helpful to read the lecture materials first.

 

Finally, here's something about the new lecture.

A lecture on implementing a DDR3 Controller for image data processing in FPGA is coming soon.

This is about designing a general-purpose Memory Interface using the Memory Interface IP provided by Xilinx and implementing a Frame Buffer for image data processing using it.

Thank you for your interest.

 

I'll share a coupon code with you.

image

 

thank you

 

 

 

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