I was overwhelmed when trying to use the DDR Controller, but this course does a great job of teaching the essential parts I needed. I was struggling with where to start and how to read Xilinx's documentation, but after taking the course, I feel like I can see the path forward. Thank you for the excellent course.

mjs1004

Through this lecture, you will be able to implement a DDR controller using FPGA.

ihil

인프런 10주년! 사랑주간 전체 할인

Verilog FPGA Program 3 (DDR Controller, Arty A7-35T)

verilog

베릴로그

fpga

강의을 통하여 FPGA를 이용한 DDR Controller를 구현할 수 있습니다.

alex

입문

초급

중급이상

필드 프로그래머블 게이트 어레이

FPGA

개요

HW 구성

DDR Controller IP 생성

Simulation

User Interface Logic 구현

DDR3 Memory Access 속도

Frame Buffer 구현

32Bits Interface 구현

Spartan6 DDR Controller 구현

DDR4 Controller 구현

기타